50 nm Silicon-On-Insulator N-MOSFET Featuring Multiple Stressors: Silicon-Carbon Source/Drain Regions and Tensile Stress Silicon Nitride Liner

200615 citationsJournal Article

Authors

Kah‐Wee Ang · National University of Singapore

King Jien Chui · National University of Singapore

Hoong Chor Chin · National University of Singapore

Yee‐Loo Foo · Institute of Materials Research and Engineering

Anyan Du · Institute of Microelectronics

Deng Wei · Institute of Microelectronics

M.-F. Li

Abstract

A novel n-channel strained SOI transistor featuring silicon-carbon (SiC) source/drain (S/D) regions and tensile stress silicon nitride (SiN) liner is demonstrated for the first time. Drive current I Dsat enhancement contributed by the dual stressors is found to be additive and a significant increase in I Dsat of 55% is observed at a gate length L G of 50 nm. In addition, we report the dependence of drive current on channel orientation, with highest I Dsat observed for strained n-MOSFETs with the |010| channel direction. A study of the carrier transport characteristics indicate reduced channel back-scattering and enhanced carrier injection velocity due to the strain effects

Topics & Keywords

Semiconductor materials and devices Advancements in Semiconductor Devices and Circuit Design Silicon Carbide Semiconductor Technologies

Publication Details

Volume 22, pp. 66-67

DOI: 10.1109/vlsit.2006.1705219

Field-Weighted Citation Impact: 3.76

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50 nm Silicon-On-Insulator N-MOSFET Featuring Multiple Stressors: Silicon-Carbon Source/Drain Regions and Tensile Stress Silicon Nitride Liner

Authors

Abstract

Topics & Keywords

Publication Details