An Ultra-Low-Cost High-Performance Bluetooth SoC in 0.11-$\mu{\hbox {m}}$ CMOS

A highly integrated ultra-low-cost high-performance Bluetooth 3.0+EDR SoC is implemented in 0.11-μm digital CMOS technology. The transceiver has an integrated balun shared between TX and RX, eliminating the need for a separate T/R switch. A 4 × LO-based VCO is implemented to reduce LO pulling and to minimize TX out-of-band spurious emissions. The transmitter provides high output power of +10 and +7 dBm in BDR and EDR3 modes respectively, with 1.5-kHz frequency stability and <; 6% rms DEVM. The receiver sensitivity is -95.5, - 96.5, and -89 dBm for BDR, EDR2, and EDR3 modes respectively. Total SoC DC current consumption for continuous TX transmission at +10 dBm output power is 48 mA and for continuous RX reception at reference sensitivity level is 35 mA. Total die size is 5.7 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , of which 1.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> is occupied by RF, analog, and PMU circuits.