TWO CELLULAR ARCHITECTURES FOR INTEGRATED IMAGE SENSING AND PROCESSING ON A SINGLE CHIP

Two architectures for a programmable image processor with on-chip light sensing capability are described. The first is a VLSI implementation of a cellular neural network. The second is a distributed dual-structure mutation of the first architecture. The distributed dual architecture leverages the speed of silicon against the large silicon area requirements. Moreover, the innovative integrated nature of the dual-structure design significantly reduces the bottleneck and computational overload caused by data transfer from sensory focal plane to the image processor. The paper also describes VLSI chip prototypes and test results.