High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low-power (VCC=0.5V) logic applications

This paper describes for the first time, a high-speed and low-power III-V p-channel QWFET using a compressively strained InSb QW structure. The InSb p-channel QW device structure, grown using solid source MBE, demonstrates a high hole mobility of 1,230 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V-s. The shortest 40 nm gate length (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ) transistors achieve peak transconductance (G <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> ) of 510 muS/mum and cut-off frequency (f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> ) of 140 GHz at supply voltage of 0.5V. These represent the highest G <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> and fT ever reported for III-V p-channel FETs. In addition, effective hole velocity of this device has been measured and compared to that of the standard strained Si p-channel MOSFET.