Efficient, high gain with low side lobe level antenna structures using parasitic patches on multilayer superstrate

Abstract In this article, we propose efficient high gain with low side lobe level (SLL) antenna structures using parasitic patches (PPs) on multilayer superstrates. The antenna structures consist of a microstrip antenna that feeds an array of square PPs fabricated on multilayer FR4 superstrates. The patches fabricated on multilayer superstrate are suspended in air with the help of dielectric rods at integral multiple of λ 0 /2. The structure with 9 × 9 array of square PPs on a superstrate layer at λ 0 /2 provides a gain of 19 dB, which increases to 21.1 and 21.8 dB when the superstrate layer height is increased to 1.0 and 1.5 λ 0 , respectively. However, SLL increases with increase in superstrate height. Gain enhancement with low SLL is achieved using PPs on multilayer superstrate. The antenna with 3 × 3 and 9 × 9 array of square PPs on superstrate layers at 0.5 and 1.5 λ 0 , respectively provides a gain of 22.7 dB with 92% efficiency, SLL of −22.3 dB and front to back lobe ratio of more than 20 dB. Structure is designed, fabricated, and tested. The measured VSWR is <2 over 5.725–5.875‐GHz frequency band. The proposed structure is an attractive solution for several wireless communication systems, such as base station cellular systems, satellite systems, and point‐to‐point links. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:1488–1493, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26818