Conductance in Restricted-Dimensionality Accumulation Layers

Conductance has been studied in metal-oxide-silicon field-effect transistor accumulation-layer samples in which it is possible to constrict the channel to small dimensions both perpendicular to the surface and perpendicular to the channel. A temperature-dependent conductance $\ensuremath{\sigma}={\ensuremath{\sigma}}_{0}\mathrm{exp}[\ensuremath{-}{(\frac{{T}_{0}}{T})}^{n}]$ is observed, where $n=\frac{1}{2}$ for small channel widths and $n=\frac{1}{3}$ for larger channel widths. It is believed that this behavior arises from a transition from one-dimensional to two-dimensional variable-range hopping in the sample.