Proteus: An ASIC Flow for GHz Asynchronous Designs

201180 citationsJournal Article

Authors

Peter A. Beerel · University of Southern California

Georgios D. Dimou · Fulcrum Corporation (United States)

Andrew Lines · Fulcrum Corporation (United States)

Abstract

Editors' note:The high-performance benefits of asynchronous design have hitherto been obtained only using full-custom design. This article presents an industrial-strength asynchronous ASIC CAD flow that enables the automatic synthesis and physical design of high-level specifications into GHz silicon, greatly reducing design time and enabling far wider use of asynchronous technology.—Montek Singh (UNC Chapel Hill) and Luciano Lavagno (Politecnico di Torino)

Topics & Keywords

VLSI and FPGA Design Techniques Interconnection Networks and Systems Low-power high-performance VLSI design

UN Sustainable Development Goals

Industry, innovation and infrastructure

Publication Details

Published in: IEEE Design & Test of Computers

Volume 28, Issue 5, pp. 36-51

DOI: 10.1109/mdt.2011.114

Field-Weighted Citation Impact: 6.36