Investigating the Impact of Supply Noise on the Jitter in Gigabit I/O Interfaces

Minimizing the jitter due to supply noise is the most important design goal for the power delivery system of highspeed interfaces. We present a detailed analysis of supply noise induced jitter in a high-speed interface. We first simulate the supply noise spectrum generated in the interface. We then measure the sensitivity of the interface circuits to noise as a function of noise frequency. Next, we analyze the jitter spectrum by combining these two parameters. Based on this analysis, we observe large jitter contributions at medium frequencies. This is not expected if we consider only the supply noise current spectrum since the medium frequency is way below the data rate or the frequencies of internal clock signals. However, it can be easily explained with the power supply network impedance profile. Finally, we correlate the predicted jitter spectrum with the measured jitter spectrum of a serial link operating at 6.4 Gbps.