Design and performance of improved Column Parallel CCD, CPC2

The Linear Collider Flavour Identification (LCFI) Collaboration is developing the sensors, readout electronics and mechanical support structures for the vertex detector of the International Linear Collider (ILC). High speed readout is needed to ensure that the occupancy due to the pair production background at the ILC is kept below the 1% level. In order to satisfy this requirement, Column Parallel CCDs (CPCCDs), Column Parallel Readout chips (CPRs) and Column Parallel Driver chips (CPDs) have been developed. The CPCCD has to operate at a clock frequency of 50 MHz, which represents a difficult technical challenge due to the large sensor capacitance. The design and performance of the second generation CPCCD sensors, CPC2, and the new driver chip, CPD1, which meet these challenging requirements, are described.