Random walks for circuit clustering

200240 citationsJournal Article

Authors

J. Cong · University of California, Los Angeles

L. Hagen · University of California, Los Angeles

Andrew B. Kahng · University of California, Los Angeles

Abstract

The authors introduce a fast, parallelizable approach to circuit clustering based on analysis of random walks in the netlist. The method yields good clustering solutions for classes of 'difficult' inputs in the literature as well as for industry benchmark circuits. The authors characterize their results using a new clustering metric which facilitates comparison with future work. Extensions to a number of other CAD applications are proposed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>

Topics & Keywords

VLSI and FPGA Design Techniques VLSI and Analog Circuit Testing Low-power high-performance VLSI design

UN Sustainable Development Goals

Industry, innovation and infrastructure

Publication Details

DOI: 10.1109/asic.1991.242897

Field-Weighted Citation Impact: 3.73