CMOS MAPS with Fully Integrated, Hybrid-pixel-like Analog Front-end Electronics

This paper discusses the criteria underlying the design of an innovative type of monolithic active pixel sensor (MAPS) in CMOS technology. The device was conceived to incorporate the potential for thin detector fabrication typical of MAPS devices and the flexibility and high functional density featured by hybrid pixel sensors. The detector layout takes advantage of the large miniaturization scale of deep submicron CMOS technologies and of the triple-well structure they offer. A proof-of-principle test chip, named Apsel0, has been thoroughly characterized, with promising results. Based on the outcomes of this first step, a second prototype was designed, paying particular attention to the noise performances of the front-end electronics. In this work, the experimental characterization of the Apsel0 chip, including data from radioactive source (90Sr, 55Fe) tests, will be presented. Also preliminary results from the just started measurement campaign on the second prototype, Apsel1, will be shown and discussed. 1.