Improved Harmonics in Metal Insulator Metal Capacitors Using Design Techniques

The measured harmonic distortion from a metal-insulator-metal (MIM) capacitor is reduced using series, anti-series and anti-parallel configurations. The anti-series and anti-parallel connections of matched capacitors can completely eliminate the 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> harmonics originating from the device and the measured 2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> harmonics for those structures is mostly due to the substrate and hence high resistivity silicon-on-insulator (HR-SOI) substrates are preferred. 2-stack series and anti-series configurations can reduce the 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> harmonics by almost 12 dBm which can be further decreased by increasing the number of capacitors in the stack. Anti-parallel connection can be designed for the same Q factor and footprint as that of a single device. To achieve the same Q of a single device the width has to be doubled for 2-stack series and anti-series configurations while the footprint increases four times.