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VERIFICATION OF PROJECTS AND CREATION OF TEST SEQUENCES FOR CHIP DESIGN

201947 citationsJournal Article

Authors

Vladimir Zolnikov

Vladimir Zolnikov · Voronezh State University of Forestry and Technologies

Светлана Евдокимова

Светлана Евдокимова · Voronezh State University of Forestry and Technologies

Татьяна Скворцова

Tatyana Skvortsova · Voronezh State University of Forestry and Technologies

Topics & Keywords

VLSI and Analog Circuit Testing Embedded Systems Design Techniques Manufacturing Process and Optimization

UN Sustainable Development Goals

Industry, innovation and infrastructure

Publication Details

Published in: Modeling of systems and processes

Volume 12, Issue 1, pp. 10-16

DOI: 10.12737/article_5d639c80c07798.20924462

Field-Weighted Citation Impact: 8.91

VERIFICATION OF PROJECTS AND CREATION OF TEST SEQUENCES FOR CHIP DESIGN | Researchclopedia