A Stacked Embedded DRAM Array for LPDDR4/4X using Hybrid Bonding 3D Integration with 34GB/s/1Gb 0.88pJ/b Logic-to-Memory Interface

Increasing demand for DRAM scaling and high-bandwidth has driven DRAM technology to 3D/2.5D integration. With the innovative Hybrid Bonding technology, a new Stacked Embedded DRAM (SEDRAM) architecture was developed on LPDDR4/4X product. In this SEDRAM, a DRAM array wafer and logic wafer were fabricated separately and then face-to-face fusion connected through ultra-high-density, low-resistance Hybrid Bonding. By separating the control, I/O, DFT and periphery circuits to a logic die, SEDRAM offers a novel approach to DRAM product development and accomplishes an extremely high-bandwidth logic-to-memory interface speed of 34GBps per 1Gb with low power consumption as low as 0.88pJ/bit.