Empirical Procedure for Estimating Mutual Coupling in High-Performance Power Modules

Modeling the parasitic inductance of power modules is often necessary to support internal layout optimization as well as application-level simulation studies. With the accelerating commercialization of wide bandgap semiconductors, the adverse effects of parasitic inductance in power modules are widely recognized. Accordingly, module manufacturers are exploring mechanisms to minimize parasitic inductance, such as flux cancellation between power terminals. For modeling purposes, flux cancellation is represented by two coupled inductors in the parasitic model of a power module. Traditional measurement-based techniques for estimating power module parasitics often neglect mutual coupling between terminals and very few studies have been reported that focus on this aspect of module characterization. This paper proposes a new, non-destructive, measurement-based technique to address this gap in the empirical characterization of power module parasitics. This technique is verified through analysis of a specially designed test subject and subsequently applied to a SiC MOSFET power module from CREE.