Transputer Hardware and System Design

199312 citationsBook

Authors

Abstract

Introduction to transputer transputer architecture 2-cycle memory interface interfacing with the 2-cycle memory interface interfacing with the 3-cycle memory interface transputer system interconnection testing and debugging second generation transputers - the H1.

Topics & Keywords

Parallel Computing and Optimization Techniques Embedded Systems Design Techniques Distributed and Parallel Computing Systems

UN Sustainable Development Goals

Affordable and clean energy

Publication Details

Published in: CERN Document Server (European Organization for Nuclear Research)

Field-Weighted Citation Impact: 1.65