Through dielectric via etching in magnetic neutral loop discharge plasma for 3D chiplets interconnect

For 3D chiplets integration, a high aspect ratio through dielectric via (TDV) fabrication method has not been clearly established. This is because Si-O bonding is stronger than Si-Si bonding, which requires more precise control of the reactive ion etching (RIE) with long mean free path and below IPa process etching condition. As a countermeasure, magnetic neutral loop discharge (NLD) plasma source addresses this issue. In this paper, the high density NLD plasma etcher was tried to deep TDV fabrication. As a result, the vertical TDV etching, with a diameter of 16.5 um and an etching depth of 80 μm, resulting in an aspect ratio of 4.85, was successfully achieved using NLD plasma.