Implementation of a turbo code interleaver algorithm based on FPGA

By analyzing the structural composition of Turbo codes, this paper delves into one of its crucial components, the interleaver, discussing its role, various types, and distinct characteristics. Given the interleaver's capability for composite interleaving, this study proposes a pseudo-random spiral interleaving method that balances the need for high randomness with ease of engineering implementation. The scheme is realized through programming in the hardware description language Verilog, and simulation results are presented. The findings validate that the pseudo-random spiral interleaver exhibits strong randomness and is relatively easy to implement in hardware, bearing significant engineering value.