DRS4 based SiPM readout electronics for the Cosmic Muon Veto Detector at IICHEP

A cosmic muon veto detector (CMVD) is being built around the mini-ICAL detector which is operational at IICHEP, Madurai. It will study the feasibility of building a shallow depth neutrino detector. It’s being built using extruded plastic scintillator (EPS) strips. Muon interactions in the EPS are detected by SiPMs mounted at the end of 2 wavelength shifting fibres which are inserted in the EPS strips. The muon detection efficiency of the CMVD is required to be more than 99.99%. Faithful detection of muons requires SiPM charge measurement. SiPM signals are converted to voltage pulses by trans-impedance amplifiers. A DRS4 based readout system is being designed to sample the signals at a rate of 1 GS/s. The samples are digitised on receiving a mini-ICAL trigger, and zero suppressed data are transmitted to the back-end data server. An FPGA based DAQ board consisting of 5 DRS4 ASICs and a network interface is being designed. This paper will discuss the prototype design of the SiPM readout board.