Reflow Process Effect on Single Microvias of Different Layers in the Printed Circuit Board

The reliability of microvias in high-density interconnect (HDI) printed circuit boards (PCBs) is critical for ensuring robust electrical performance, particularly under thermomechanical stress during the reflow process. This study investigates the effect of microvia placement within multilayer PCBs using a global-to-submodel finite element approach. The analysis reveals that microvia location significantly influences stress distribution, plastic strain accumulation, and deformation patterns, with higher stress concentrations observed in constrained regions and near material interfaces. Microvias located in high-stiffness zones are more susceptible to mechanical failure, including cracking and separation, due to coefficient of thermal expansion (CTE) mismatches between copper and dielectric materials, which can also contribute to warpage and delamination in the surrounding PCB structure. A Python script was developed to automate the entire modeling and simulation process, ensuring a more efficient and systematic analysis. These findings emphasize the importance of optimizing microvia placement to enhance PCB structural integrity and long-term reliability.