An Automatic Approach on Sizing Current Limitation Circuitry for Linear Regulators Used in PMICs

This paper introduces an automated sizing strategy for overcurrent protection circuits in CMOS Low-Dropout Regulators (LDOs) using features in the AnaGen workflow developed by the author. The method automates key design steps, including sizing, verification, optimization, and schematic generation, which are critical for automotive LDOs. The proposed method allows efficient redesign of circuit topologies for varying specifications or design kit migrations by defining technology agnostic sizing and proper limits. Robust solutions are provided in significantly less time compared to manual methods.