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Chip Scale Packaging Overview and Failure Analysis Challenges

20250 citationsJournal Article

Authors

Susan Li · Marvell (United States)

Abstract

Abstract Presentation slides for the ISTFA 2025 Tutorial session “Chip Scale Packaging Overview and Failure Analysis Challenges.”

Topics & Keywords

Integrated Circuits and Semiconductor Failure Analysis 3D IC and TSV technologies Electronic Packaging and Soldering Technologies

Publication Details

Published in: Proceedings - International Symposium for Testing and Failure Analysis

Volume 85229, pp. t1-t75

DOI: 10.31399/asm.cp.istfa2025tp00t1

Field-Weighted Citation Impact: 0.00

Chip Scale Packaging Overview and Failure Analysis Challenges | Researchclopedia