The phase number reduction technique in auto-zero mode of ping-pong auto-zero amplifier with common-mode feedback technique

Ping-Pong auto-zero (AZ) amplifiers require high-speed switching to amplify with high frequency signals. In Ping-Pong auto-zero amplifiers, a Common-Mode Feedback (CMFB) technique, in which the two-input Common Sense Amplifiers (CMSA) of the Common Sense (CMS) blocks are shared by using a sample-and-hold circuit, is often used. This configuration is effective for reducing transient switching of the output common-mode voltages. However, this technology requires a multi-phase clock, which complicates the clock generation circuit and makes it difficult to increase the switching frequency. This letter describes the phase number reduction technique in Ping-Pong AZ. The proposed technique reduces the required phase number to two phases by using a 4-input CMSA instead of a 2-input CMSA. Furthermore, the impact on offset due to the change to the 2-phase configuration can be mitigated by inserting an integrator into the AZ loop, thereby limiting the increase in σ to 1/6.06.