Subsea Mesh Networking: Interoperability Validation with Hardware-in-the-Loop Simulation

The establishment of interoperable underwater communication networks is critical for enabling scalable and vendor-independent subsea operations. The SWiG Level 3 specification introduces a dual-channel protocol architecture that supports simultaneous low-data-rate control messaging (SMAC) and high-data-rate payload communication (HDC). This paper presents a hardware-in-the-loop (HIL) simulation platform for validating SWiG Level 3 protocol functionality under realistic channel conditions. The system combines real-time FPGA-based channel modeling with industrial acoustic modem hardware, emulating multipath propagation, Doppler effects, and ambient noise. We evaluate SMAC performance under asynchronous multi-user conditions and assess HDC throughput under shallow-water propagation constraints. Results highlight the benefits of HIL-based testing for validating communication strategies and demonstrate the feasibility of concurrent SMAC and HDC operation, reinforcing SWiG Level 3 as a foundation for future interoperable subsea mesh networks.