Class $\Phi$ Resonant Gate Driver With Waveform Shaping for SiC-Based VHF Power Conversion

Driving Silicon Carbide (SiC) MOSFETs at high frequencies presents significant challenges due to their high input gate capacitance and required voltage swing. In this paper we propose a design method for a Class <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\Phi$</tex-math></inline-formula> resonant gate driver topology, implemented on a SiC device in a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mathbf {6.78}\,\mathbf {MHz}$</tex-math></inline-formula> Class E inverter power stage. The topology is modelled using state-space analysis for performance optimisation and gate voltage profile shaping. Experimental results demonstrate significant advantages compared to conventional hard-switched half-bridge gate drivers, including lower gate driver power consumption and higher power device drain efficiency. Further optimisation of the magnetic components of the gate driver resulted in a further reduction both in size and power consumption, achieving an 8.6-fold reduction in gate driving power compared to the conventional half-bridge gate driver. Additionally, the experimental setup shows improved efficiency of the power stage which correlates to a <bold xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8.8 W</b> (25.9%) reduction in loss in the power device when driven by the resonant gate driver.