Leveraging biased noise for more efficient quantum error correction at the circuit level with two-level qubits

Tailoring quantum-error-correction codes (QECCs) to biased noise has demonstrated significant benefits. However, most of the prior research on this topic has focused on code-capacity noise models. Furthermore, a no-go theorem prevents the construction of controlled- () gates for two-level qubits in a bias-preserving manner which may, in principle, imply that noise bias cannot be leveraged in such systems. In this work, we show that a residual bias up to <a:math xmlns:a="http://www.w3.org/1998/Math/MathML" display="inline"> <a:mi>η</a:mi> <a:mo>∼</a:mo> <a:mn>5</a:mn> </a:math> can be maintained in gates under certain conditions. Moreover, we employ controlled- () gates in syndrome-extraction circuits and show how to natively implement these in a bias-preserving manner for a broad class of qubit platforms. This motivates the introduction of what we call a (HBD) circuit-level noise model that captures these features. We numerically study the performance of the <c:math xmlns:c="http://www.w3.org/1998/Math/MathML" display="inline"> <c:mi>X</c:mi> <c:mi>Z</c:mi> <c:mi>Z</c:mi> <c:mi>X</c:mi> </c:math> surface code and observe that bias-preserving gates are critical for leveraging biased noise. Accounting for the residual bias present in the gates, we observe an increase in the code threshold up to a <e:math xmlns:e="http://www.w3.org/1998/Math/MathML" display="inline"> <e:mn>1.27</e:mn> <e:mi mathvariant="normal">%</e:mi> </e:math> physical error rate, representing a <h:math xmlns:h="http://www.w3.org/1998/Math/MathML" display="inline"> <h:mn>90</h:mn> <h:mi mathvariant="normal">%</h:mi> </h:math> improvement. Additionally, we find that the required qubit footprint can be reduced by up to <k:math xmlns:k="http://www.w3.org/1998/Math/MathML" display="inline"> <k:mn>75</k:mn> <k:mi mathvariant="normal">%</k:mi> </k:math> at relevant physical error rates.