RO-SVD+: A Hardware-Based Framework Against AI Attacks for Cost-Effective GenAI Copyright Protection in Consumer Electronics

The widespread integration of generative artificial intelligence (GenAI) in consumer devices has heightened the need for a cost-effective and energy-efficient mechanism to safeguard the intellectual property (IP) of artificial intelligence-generated content (AIGC). This paper proposes RO-SVD+, a hardware-based framework that exploits low-rank matrix decomposition and on-chip process variations to enable device-level traceability and high-quality randomness generation while exhibiting strong resistance to AI-driven attacks. Using AI-generated images as a case study, evaluations of a 28-nm FPGA and an ASIC design flow show up to 185× and 153× improvements in per-pixel cost-effectiveness as image resolutions scale from 32×32 to 1024×1024 under consistent power consumption. Compared with our prior work, RO-SVD+ achieves a 2× speedup in entropy extraction and a 4× improvement in cost-effectiveness for 1024×1024 matrices. Compared to other equivalent efforts, RO-SVD+ delivers 8× to 53× higher throughput with reduced FPGA design complexity and ASIC area, making it a promising hardware-based solution for copyright protection in modern consumer electronics where high-resolution and dense GenAI workloads are widely deployed.