Integrated-Circuit Supply Chain Verification Using Mask Set Comparison in the Open Source Context

This paper presents research on supply chain verification of silicon chips within an open-source context, demonstrating that the availability of mask sets for a given integrated circuit enables comparisons with those recovered from actual produced chips to detect any added or removed circuitry, thereby revealing the presence or absence of silicon backdoors. The proposed method relies on a specific sample preparation process to minimize deprocessing artifacts and employs recovery of the construction grid from captured images to achieve a distance-accurate and precise layout reconstruction. Additionally, the solution can correct feature detection errors while enabling full coverage, as well as the analysis and simulation of any discovered backdoors. The paper outlines the entire workflow-from laboratory procedures to image processing and analysis-proving that this verification approach is practical and effective in real-world scenarios.