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To increase power rating of traction/propulsion drive systems in electric vehicles (EV) and more-electric aircraft (MEA), paralleling the SiC MOSFETs is a cost-effective solution. Compared to power module packages, the discrete SiC MOSFETs with TO-247 package offer advantages of low cost, low supply chain risk, and high design flexibility, which are crucial for robotic manufacturing. However, among various device arrangements and layout configurations, it remains unclear which layout type delivers the best electrical performance with respect to minimizing parasitic loop inductance <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">loop</sub> and overlapping capacitance <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i>. Additionally, the conventional laminated layout technique introduces unbalanced current sharing among paralleled devices. To address these challenges, this paper compares different layout types and device arrangements with a focus on minimizing parasitic <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">loop</sub> and overlapping <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i>. Furthermore, based on the selected optimal layout type, a distributed-block (DB) layout concept is proposed to improve current sharing by mitigating asymmetric parasitic among paralleled traces. Two versions of heavy-copper printed circuit boards (PCBs) are designed and experimentally tested to validate the improvements in current sharing. Compared to the conventional laminated layout technique, the proposed layout significantly reduces peak current imbalances by 66.67 % in static region and 75.79 % in dynamic region. Finally, thermal tests are conducted to verify the feasibility and practical effectiveness of the proposed DB layout concept.
Published in: IEEE Transactions on Transportation Electrification
Volume 12, Issue 2, pp. 2030-2043