Reduction of Thermal Warpage in Diamond/Si Wafer by High Temperature Bonding

For the wafer-scale fabrication of diamond electronic devices, diamond/Si composite wafers were fabricated with low warpage using high-temperature bonding. Typically, thermal warpage increases with the bonding temperature because of the mismatch in the thermal expansion coefficients. However, in the diamond/Si system, thermal stress can be reduced at higher bonding temperatures because the coefficients of thermal expansion of diamond and Si reverse at approximately 600 °C. This study compares the warpage of diamond/Si wafers bonded at 1000 and 1200 °C. The height difference between the highest and lowest points of a vacuum-chucked wafer was 26 and 9 μm, respectively. The reduced surface warpage enables precise patterning of 1 μm-wide line-and-space structures using stepper lithgraphy, confirming the bonded wafer’s compatibility with the micropatterning process. Additionally, high-temperature bonding formed a 5 nm-thick interfused layer containing Si–O, C–O, and Si–C bonding networks. This contributes to a high tensile bonding strength of 14 MPa, thermal tolerance up to 1000 °C annealing, and chemical durability against NH4OH, HCl, H2SO4, H2O2, and HF. These results demonstrate that diamond/Si composite wafers are promising platforms for wafer-scale diamond electronics, effectively overcoming the size limitations associated with homoepitaxially grown diamond substrates.