Device and Circuit Level Compact Model of B/N Doped Graphene FET for RF Applications

In this work, a Verilog-A based compact model has been implemented in concurrence to a region-wise potential-based analytical model for boron/nitrogen (B/N) doped graphene field-effect transistors (GFETs). The compact model accurately validates the closed-form expressions of channel potential and drain current across all operating regions. Owing to its analytical nature, the proposed compact model is computationally efficient and readily applicable for circuit-level simulations. Furthermore, small-signal parameters such as transconductance (g<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</inf>) and in-trinsic capacitance (C<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gg</inf>, C<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">gd</inf>) have been derived mathematically and verified with the implemented model. The extracted radio-frequency (RF) figures of merit, including transit frequency (f<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf>), confirm the suitability of the model for analog/RF design exploration. The developed compact model thus provides a physics-based, circuit-compatible for the design and performance evaluation of doped GFET-based electronic circuits and systems.