ANN Surrogate Compact Modeling of Bulk CMOS Transistors: Step Toward PDK-Ready Frameworks

This paper introduces an artificial neural network (ANN) framework that constructs a surrogate compact model directly from industry-grade foundry data. GlobalFoundries 130nm bulk CMOS technology is employed as the reference dataset, enabling the framework to capture device behavior under diverse terminal biases, wide temperature variations, and multiple geometries. In contrast to prior machine learning approaches trained on synthetic or TCAD-generated data, this methodology leverages foundry data, ensuring realistic modeling and circuit-level reliability. The proposed ANN demonstrates strong agreement with the foundry data, maintains smooth derivative behavior, and exhibits robust generalization across scaling conditions. ANN-driven surrogate modeling can serve as a practical pathway toward compact model libraries suitable for process design kits (PDKs), providing accuracy and scalability for modern electronic design automation (EDA) flows.