Combined AES-256 Encryption with MATLAB and Verilog HDL Biometric Authentication

This research provides a Biometric-based AES-256 Encryption and Decryption Authentication System that combines cutting-edge cryptographic methods with fingerprint identification to offer dual-layered security. Verilog HDL implements hardware-level biometric matching and AES-256 encryption/decryption modules, while MATLAB preprocesses fingerprint images and converts them into 128-bit hexadecimal templates. The architecture was synthesized and simulated using Xilinx Vivado and includes a 256-bit key AES-256 core, a fingerprint matcher, and a Finite State Machine (FSM) controller that ensures cryptographic operations only take place when biometric authentication is completed. While study of the FPGA implementation demonstrates effective resource use, low power consumption, and minimal latency, simulation results show correct encryption, decryption, and access control.