Optimization Factors for the Thermal Design of Packaged GaN High-Electron-Mobility Transistors

In this work, the junction-to-heat sink thermal resistance (R<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${}_{\text {th}}\text {)}$</tex-math> </inline-formula> of single-finger GaN high-electron-mobility transistors (HEMTs) mounted on a high-power laminate CuMo base package was analyzed using micro-Raman thermometry and electrothermal modeling. Analysis of the internal temperature distribution reveals that the die-attach material, substrate, and the semi-insulating buffer layer, respectively, comprise 2%, 28%, and 63% of the total R<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of a packaged device. To reduce the R<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of the device, the use of a high <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\kappa }$</tex-math> </inline-formula> (22 W/m<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\cdot } $</tex-math> </inline-formula>K) silver epoxy or AuSn solder (57 W/m<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\cdot }$</tex-math> </inline-formula>K) as the die-attach material is recommended. Simulation results indicate that replacing the substrate with single-crystal diamond lowers R<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> by 21%, compared to a standard GaN-on-SiC HEMT. Regarding buffer engineering, a thinner semi-insulating GaN buffer layer leads to a reduced R<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> under a fully open channel bias condition. In contrast, under a partially pinched-off bias condition, reducing the thickness of the buffer layer from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.8~\boldsymbol {\mu }$</tex-math> </inline-formula>m to 400 nm leads to a ~10% increase in peak channel temperature rise. This finding was confirmed by performing nanoparticle-assisted Raman thermometry on transfer length method (TLM) structures with varying channel lengths, which demonstrated that buffer layer thickness optimization must account for the heat flux distribution and device geometry. Simulation results show that deposition of a polycrystalline (PC) diamond top-side heat spreader can lower R<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of a GaN-on-SiC HEMT by 17%. The findings of this work provide insight into the thermal design optimization of GaN monolithic microwave integrated circuits (MMICs).