Automatic stitching solution for multipatterning compliant routing metal layers beyond 2 nm

BackgroundMultipatterning (MPT) technology is a class of technologies for integrated circuit (IC) manufacturing to make the density of features of a layer beyond the limitations of a single exposure lithography. As the semiconductor process further scales down to 2 nm and beyond, the MPT technology has emerged as the clear choice for the routing of metal layers even within the era of extreme ultraviolet lithography. The stitching technique within MPT can divide a node into multiple nodes, each of which can be assigned to different colors to prevent color conflicts. This stitching approach is essential for resolving the m-coloring problem in the real-world patterning process without increasing the number of masks or adding chip-area penalties. As the chip manufacturing process continues to shrink, triple and quadruple patterning technologies (TPT/QPT), along with automatic stitching solution, become more and more worthwhile for chip scaling. However, as the complexity of IC design escalates, identifying the optimal stitching locations for the congested routing metal layers becomes increasingly challenging.AimSynopsys IC Validator (ICV) provides a complete and integrated flow of TPT/QPT, featuring an innovative stitching methodology.ApproachThe stitching flow consists of three key steps. Step 1 (stitch generation): generating possible effective stitches after color conflicts are detected in the initial coloring. Step 2 (link mapping): identifying spaces less than the minimum coloring distance with these stitch candidates. Step 3 (re-coloring with stitch candidates): selecting and applying valid stitches among all stitch candidates to obtain TPT/QPT-compliant layouts.ResultsICV’s stitching flow for TPT/QPT has demonstrated its effectiveness in managing the dense routing metal layers of the most advanced logic technology. By employing this sophisticated and integrated approach, we can achieve stringent chip-scaling targets while maintaining acceptable routing and coloring turnaround times. Finally, our proposed stitching solution can be seamlessly extended to more complex patterning technologies with a larger number of exposure masks (i.e., five, six masks, …), as needed.ConclusionsIn summary, ICV’s stitching technology for the MPT lithography is a valuable and efficient solution for automatic layout-fixing and engineering change order (ECO) routing, ensuring high-quality results in the most advanced logic designs.