A physics-based and accurate STI-LDMOS compact subcircuit model with modified drift region resistance and gate-drain capacitance

Abstract This paper develops a physics-based and accurate shallow trench isolation lateral double-diffused MOS (STI-LDMOS) compact subcircuit model. In the proposed direct-current (DC) model, the drift-region resistances beneath both the shallow trench isolation (STI) region and the drain electrode are incorporated, thereby significantly improving its physical fidelity and predictive accuracy of the DC characteristics. For the proposed alternating-current (AC) model, the gate–drain capacitance model is decomposed into two components: a gate–drift-region overlap charge model with modified bias dependence derived from BSIM4.5, and a parallel-plate capacitance model for the gate–STI overlap region. In addition, the gate–source capacitance and drain–source charge models are further extended to match the physical structure and to more accurately capture the dynamic characteristics of an STI-LDMOS device. The model parameters are extracted and calibrated, and the proposed subcircuit model is implemented in Verilog-A. Excellent agreement is achieved between the proposed model and both the TCAD simulation results and the measured data from a 40 V STI-LDMOS device, demonstrating its accuracy and efficiency for circuit-level simulation of STI-LDMOS devices.