Resonance Suppression and Output Current Equalization Drive Technology for Parallel Inverters in Heavy Commercial Vehicles

The paper proposes a driving technique that combines a gate pulse time adjustment method with an AC core method to suppress circulating and resonant currents in parallel inverters. The time adjustment method introduces controlled delays in the PWM signals output from the motor controller, while the AC core method connects the inverter output lines through oppositely wound cores, of each inverter, thereby contributing to system miniaturization. Experimental results show that, under operating conditions of 850V and 760Arms, the proposed approach reduces circulating current by 59% and Y-capacitor current by 63% compared with a conventional system without the proposed methods. These results indicate that the proposed technique effectively enhances the power density of parallel inverter systems.