alternative-intelligence-cp/aria: v0.7.3 — Register Allocator

v0.7.3 — Register Allocator Linear scan register allocation for the JIT assembler. Virtual registers are automatically mapped to physical registers at finalize time with automatic spill/reload when registers are exhausted. Features Linear scan allocator — O(N) register allocation with lazy IR buffering (zero overhead for pure physical register code) Liveness analysis — Per-opcode def/use tracking for all 55+ IR opcodes Spill/reload — Dual scratch register design (R10/R11, XMM14/XMM15) with RBP-relative stack slots Virtual register API — aria_asm_vreg_new_gpr(), aria_asm_vreg_new_xmm(), aria_asm_vreg_count(), aria_asm_spill_count() Auto-frame management — Auto-injects prologue/epilogue + callee-saved register preservation when needed Physical register reservation — Detects directly-used physical registers and reserves them from allocation Mixed register support — Physical and virtual registers can be freely mixed in the same function Register Landscape 12 allocatable GPRs, 14 allocatable XMMs Caller-saved registers allocated first to minimize overhead SysV AMD64 ABI compliant Tests 17 new tests (21 assertions) — all pass at -O2 v0.7.2 regression: 23/23 pass v0.7.1 security regression: 10/10 pass assembler.cpp: ~1100 → ~1850 LOC