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Recent events have inexorably altered the ways in which people around the world now engage in their everyday activities. Up until 2020, working from home was the exception rather than the rule; streaming movies was a secondary distribution method for the big studios as opposed to their primary outlet; medical appointments would be done face-to-face not via a video call. The way we pay for goods & services is predominantly moving to contactless methods and with various governments pledging to reduce emissions and promote the use of electric vehicles these steps are bringing in an exciting period of expansion for the whole semiconductor ecosystem. All of the activities listed above, plus numerous others, depend on new generations of semiconductors supporting the required infrastructure. Examples of such setups include 5G, server farms, smartchips, and wide-band gap power devices, all of which form the building blocks of the ‘new normal’. Server farms are driving the evolution of high bandwidth memory (HBM) solutions, several memory die stacked together to provide the necessary performance. New techniques of packaging and integration, eg. hybrid bonding, demand further improvements in die quality and cleanliness than is currently obtainable through mechanical singulation techniques. Bonding success needs the step change improvement in die quality and die strength that comes with the motivation behind plasma dicing. The use of plasma etch as a singulation solution is approaching a level of maturity where the prior levels of concern about the exposure of finished die to plasma etch chemistry are much better understood and, for the most part, resolved. For silicon wafers, the etch step is of relative simplicity when compared to the challenges raised in the integration of the process into the backend and assembly flows. Solutions to the needs of providing patterning, in some form, to define the etched regions have been realised with options including both LASER grooving and photolithography steps. More recently, the most significant effort has gone in to establishing material and process regimes that help to ease the adoption of plasma dicing, in particular the management of fluorine. Managing the consequences of using a fluorinated chemistry is an area where a lot of attention and effort has been necessary. The Bosch process method for deep, anisotropic etching of silicon uses repeated loops of fluorinated gases to create a protective CFx polymer coating on the structure sidewall and then to conduct isotropic etch steps. As plasma dicing is effectively a deep trench etch, this process method is ideal. At the end of the dicing etch, the sidewalls of the die may retain a thin patina of the generated CFx polymer and there is also going to be remnants of the etch chemistry on the die surface. The vast majority of die will have either bond pads or bumps on the top surface, ready for whatever interconnect step follows. In the case of Al bond pads, the surface reaction that occurs when F is present, causes corrosion in the form of AlxFyOz compounds. These compounds impede the successful application of the subsequent wire bond, leading to yield loss or premature failure in service of the finished device. Initially observed after etching operations in the final stages of the front-end manufacturing flow, these phenomena are now well characterised and countered through effective fluorine cleaning processes such as argon sputtering. However, the addition of a fluorine-based dicing process at the start of the backend and assembly flow leads to the risk of reproducing these effects before the bonding steps. Whilst similar cleaning methods could be implemented here, preventative solutions are also available and preferred to simplify the integration of the technology. For the various solder bump materials, there is a similar risk of F compounds affecting the wettability and strength of the final solder joints. However, for these materials, there is also a school of thought that considers F to be a positive addition. Regardless of the possible impact of fluorine in this configuration, there are fewer well-characterised methods available for robust reliability assessment, especially where the final interconnection assembly is completed after sale and delivery of the finished device. Consequently, the understanding of fluorine contamination control obtained through the study of the wire bonding case is of special relevance here. The sidewall polymer, in its ‘non-stick’, Teflon-like form, can cause problems if there is bonding of any sort to take place. This could be the bonding of two die together, side by side, or the placement of the die into an adhesive. In any of the cases, described above, without solutions there is the real risk that broad adoption of plasma dicing would be severely limited. Covering the various mechanisms by which the F residues can form on the die during the plasma dicing process, this paper will discuss the resulting outcomes of the various schemes that have been trialled to deal with them. These developed methodologies have been applied in an aim to prevent, or reduce, the effects of the F residues. Data from critical die testing regimes will be presented showing the impact of these methods on wire bond strength, as measured, for example, by ball shear testing after thermal and humidity treatment, and electrical characterisation of finished, packaged devices following exposure to a series of accelerated ageing conditions.