A Detailed Examination of Polysilicon Resistivity Incorporating the Grain Size Distribution

Current transport in polysilicon is a complicated process with many factors to consider. The inhomogeneous nature of polysilicon with its differently shaped and sized grains is one such consideration. We have developed a method that enhances existing resistivity models with a 2-D extension that incorporates the grain size distribution using a Voronoi-based resistor network. We obtain grain size distributions both from our growth simulations (700, 800, and 900 K) and experimental analysis. Applying our method, we investigate the effect that variation in grain size produces with cases of different average grain sizes (2 nm–<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3~\mu $ </tex-math></inline-formula>m). For example, the resistivity of polysilicon with an average grain size of 175 nm drops from 11 to 4.5 k<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega \cdot $ </tex-math></inline-formula>cm when compared with conventional 1-D modeling. Our study highlights the strong effect of grain size variation on resistivity, revealing that wider distributions result in significant resistivity reductions of up to more than 50%. Due to larger grains present with a grain size distribution, current transport encounters fewer grain boundaries while the average grain size remains the same resulting in fewer barriers along the current transport path. Incorporating the grain structure into the resistivity modeling facilitates a more detailed and comprehensive characterization of the electrical properties of polysilicon.