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Thermal interface materials are critical to the heterogeneously integrated semiconductor packages as heat fluxes exceed <tex>$100 ~\mathrm{W} / \text{cm}^{2}$</tex>. Solder-based TIMs provide a great alternative to polymer and liquid metal TIMs for high-power applications like microprocessors, GPU arrays, ASICs, and FPGAs. Indium alloy solders with high thermal conductivity and low reflow temperatures are considered an excellent choice for TIM1 applications. By contrast, SAC alloys have higher reflow temperatures and lower thermal conductivity. Solder TIMs are immune to pump-out and dry-out failure modes but are required to be fabricated using an optimized reflow process to reduce the potential voids generated during the melting of the solder over the surface of large dies. This work employs coupons with a <tex>$40 ~\text{mm} \times 40 ~\text{mm}$</tex> silicon die along with a copper lid and solder preform to study void formation during the solder TIM reflow that has been seen as one of the main drawbacks. The reflow profiles for three indium-silver alloys (with silver content ranging from 0 % to 10 %) were optimized to minimize post-reflow voids or defects for various thicknesses <tex>$(101.6 \mu ~\mathrm{m}, 228.6 \mu ~\mathrm{m}$</tex>, and <tex>$508 \mu ~\mathrm{m})$</tex> of solder preforms. The vacuum reflow oven with an inline vacuum chamber equipped with IR heaters is used to manipulate the temperature profiles the test coupons will undergo using a decoy STIM sample. The time spent by the STIM test coupon in the vacuum chamber can be controlled programmatically, and temperatures were adjusted using the IR heaters to manage the peak temperature and the Time Above Liquidus (TAL). The defect fraction in the TIM layer primarily depends on the peak temperature, time above liquidus temperature, and the time spent in the vacuum chamber. These parameters were successively iterated to reduce voids and overall process time. The vacuum chamber enhances the aggregation and removal of voids from the TIM layer by degassing bubbles from the solder when it is in the liquid phase. X-ray imaging and acoustic microscopy were used to identify voids, cracks, and delamination defects in the solder TIM layer in the test coupons. The vacuum pressure profile is also manipulated from a standard vacuum to a pulsed pressure profile that can enhance the minimization of defects in the STIM layer and the effect of this on the overall defect fraction is discussed. The different areal defect fractions for the non-optimized and optimized reflow processes for the different STIM bondline are reported in this work along the reflow profiles.