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Premkishore Shivakumar | Researchclopedia
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Premkishore Shivakumar
The University of Texas at Austin
Top Works
Embedded Systems Design Techniques
Radiation Effects in Electronics
The optimal logic depth per pipeline stage is 6 to 8 FO4 inverter delays
M.S. Hrishikesh
,
Doug Burger
,
et al.
2002
240 citations